CPU Design Verification - Staff Engineer

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Roles and Responsibilities

o   Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling.

o   Work closely with design/verification teams within CPU to develop comprehensive test plan.

o   Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus.

o   Verify power intent through use of methodologies like UPF.

o   Work closely with system architects, software teams and Soc team to validate system use cases.

o   Work closely with emulation team to enable verification on emulators and FPGA platforms.

o   Debug and triage failures in simulation, emulation and/or Silicon.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Minimum Requirements:

o   BE/BTech degree in CS/EE with 5+ years’ experience.

o   Experience in power management verification.

o   Implementation of assembly and C language embedded firmware.

o   Experience in C/C++, scripting languages, Verilog/system Verilog.

o   Strong understanding of power management features in CPUs and CPU based Socs.

o   Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc.

Preferred Requirements:

o   Good Understanding of CPU architectures and CPU micro-architectures.

o   In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture

o   Experience with advanced verification techniques such as formal and assertions is a plus

o   Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus.

Applicants: If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to 

Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm’s toll-free number found

for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.

Qualcomm is an equal opportunity employer and supports workforce diversity.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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