NOC Design Implementation -Staff/Sr Staff

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Network-on-chip (NoC)/ Interconnect  implementation  for the next generation System-on-chip (SoC) for smartphones, notebooks, smart glasses, tablets and other product categories. The roles and responsibilities for this position includes but not limited to:-

• Design implementation for Next-gen Qualcomm coherent and non-coherent interconnect fabric

• Responsible for Floor planning, design optimization for synthesis and PD  for all the Qualcomm  interconnects

• Partner with NoC design team to improve micro architecture to ensure the design meets all implementation requirements.

• Actively work with SoC Architecture, physical design team, Soc Floorplan, core teams and various other interconnect teams in various other sites

• Will be part of BDC infrastructure (NoC/Interconnect) core team

• Working with design and DFT teams on understanding design in context of physical design timing closure and power optimization

• Working across teams to align on important areas of PPA improvement and ensure targets are met; ensures designs are innovative and compatible with highest standards.

• Manage SoC dependencies, planning and tracking of all back-end design related tasks

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

• 10+ years of solid experience in IP/SoC implementation

• Expertise in digital flow design implementation RTL to GDS

• Knowledge of ASIC back-end design flows and methods and tools (Design compiler,PrimeTime, ICC2, Innovus, )

• understanding of STA and timing closure methodologies, including effect on congestion/routing/power.

• Knowledge of entire PD flow from netlist to GDS (Floorplanning, Power planning, Placement/CTS/Routing and corresponding optimization steps).

• Have experience in driving timing convergence at Chip-level and Hard-Macro level

• Understanding of interconnect protocols like CHI/AHB/AXI/ACE/ACE-Lite/NoC concepts

• knowledge of Digital Design and RTL development

• Understanding of multi-core ARMv8/v9 CPU architecture, coherency protocols and virtualization.

• Working knowledge of Lint, CDC, PLDRC, CLP etc

• Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification

• Experience in driving the project milestones across the design, verification and physical implementations

• Should possess effective communication and leadership skills

• Experience in design automation using TCL/Perl/Python.

Applicants: If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to 

Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm’s toll-free number found

for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.

Qualcomm is an equal opportunity employer and supports workforce diversity.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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If you would like more information about this role, please contact

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